Method of forming a metal rectifying contact to semiconductor material by displacement plating



Aug. 20, 1968 c, A TM ETAL 3,397,450

METHOD OF FORM NG METAL RECTIFYING CONTACT TO SEMICONDUCTOR ERIAL BYDISPLACEMENT PLATING 3 Sheets-Sheet 1 Original Filed Jan. 31,

FIG.|A

Aug. 20. 1968 c. A. BITTMANN ETAL 3,397,450

METHOD OF FORMING A METAL RECTIFYING CONTACT TO SEMICONDUCTOR 5Sheets-Sheet 2 MATERIAL BY DISPLACEMENT PLATING Original Filed Jan. 31,1964 F|G.3B 3| x I 32 P 33 r 1 A Q INVENTQRS CHARLES A.B|TTMAN" cum-EyeAH BY f A ORN s Aug. 20, 1968 c, TT ET AL 3,397,450

METHOD OF FORMING A METAL HECTIFYING CONTACT TO SEMICONDUCTOR MATERIALBY DISPLACEMENT PLATING Original Filed Jan. 31, 1964 3 Sheets-Sheet 5FIG.5F

i N A\ INVENTORS FIG. 5E CHARLES A.BITTMANN CHIH'yG SAH Ml ATTORNE iedStates METHOD OF FORMING A METAL RECTIFYING CONTACT T SEMICONDUCTORMATERIAL BY DISPLACEMENT PLATING Charles A. Bittmann, Los Altos, andChill-Tang Sah, Mountain View, Calif., asisgnors to Fairchild Camera andInstrument Corporation, Syosset, N.Y., a corporation of DeiawareOriginal application Jan. 31, 1964, Ser. No. 341,717.

Divided and this application May 26, 1966, Ser. No.

3 Claims. (Cl. 29-578) ABSTRACT OF THE DISCLOSURE This application is adivision of application Ser. No. 341,717, filed Jan. 31, 1964.

This invention relates to an improved high frequency transistor andmethod of its manufacture; in particular to a transistor having a thin,diffused base region and a metal emitter.

Metal-semiconductor barrier junctions are well known in the art. Asexemplified by the devices of U.S. Patent 2,930,949, metal-semiconductorjunctions are commonly used as both the emitter-base and base-collectorjunctions of a transistor. By a process called jet-electroplating, ashallow underlying aperture or dimple is etched into the wafer surfaceand then a metal is deposited onto a semiconductor wafer. Two suchdimples, each containing a deposited metal dot, oppose each other inopposite surfaces of the Wafer, the semiconductor region between themforming the transistor base. Each aperture forms a rectifying junctionwith the semiconductor material, with the metal dot in one acting as theemitter and the dot in the other acting as the collector.

One requisite of high-frequency transistors is a high maximumoscillation frequency, f (the highest frequency at which the transistorcan be made to oscillate, under optimum conditions). The fmax. of anytransistor at a given operating point is therefore the upper boundary ofthe frequency range over which the transistor is an active device (atthat point). At frequencies above fmax. the transistor can no longerprovide useful gain, since any device with power gain can be made tooscillate by feed ing all the available output back to the input withthe proper phase. Conversely, if the transistor is able to oscillate ata given frequency, it can also (with suitable circuitry) provide gain atthat frequency. Thus it may be seen that the f,,,,,,, is also thefrequency at which the maximum available power gain is 1.

The value of f provides a conservative index of transistor capability,since circuit losses and maladjustrhents can reduce, but never increase,the measured maxi mum oscillation frequency. The high maximum frequencylimits necessitated by resent developments in microwave transistors havebeen difiicult to achieve with the prior-art structure. The base has hadto be at least a few microns wide, to provide structural stability andto prevent emitter-to-collector shorting, yet excessive base atent CPatented Aug. 20, 1968 width contributes greatly to increased carriertransit time in the base, and the i is inversely proportional to thesquare root of the transit time.

Another characteristic of prior art devices which materially increasesthe base spreading resistance (and so decreases the maximum oscillationfrequency) is the very high resistivity of the base region itself(between the metal emitter and the collector). This has been deemednecessary to obtain a high emitter efficiency; it is well known thatcarriers inject less readily into a heavilydoped region with a highcarrier concentration than they do into a lightly-doped region of highresistivity. For improved transistor action and operation, therefore,the prior art has used lightly-doped semiconductor material for the baseregion.

The transistors of this invention employ an entirely new structureyielding a very high maximum oscillation frequency, rendering themdesirable for use as microwave transistors. They use ametal-semiconductor emitter-base junction, and a diffused base-collectorjunction; owing to the nature of the diffusion process, the diffusedbase region necessarily has appreciably lower resistivity at the surfaceWhere injection occurs than does one formed as in the prior artdiscussed above. This lower resistivity would be expected to reduceemitter etficiency substantiallyeven to such an extent as to render thedevices impractical-yet it has been surprisingly discovered that suchdevices are actually superior to their prior-art predecessors inoperation. Transistor structures having a very thin diffused base regionare thus made possible; the decreased resistivity of the base regioncombines with the decreased width to yield an appreciable increase inthe obtainable f In a preferred embodiment of the invention, atransistor structure is fabricated which has a high resistivity at thesurface of the base region (where the emitter is attached), but a muchlower resistivity just below this region. Such a configuration, madepossible by outdifiusion, provides both the low overall base resistivitywhich is necessary for a high f and the lightly doped semiconductormaterial immediately underlying the emitter which insures satisfactoryinjection characteristics.

If desired, the width of the base region underlying the base contact mayexceed that under the metal emitter. Such a structure permits a verythin base region under the emitter (assuring a high f but providesadditional thickness beneath the base contact (which is alloyed to thesurface of the semiconductor material). By use of this structure thedanger of a contact shorting out the base and collector during thealloying process is considerably lessened.

Additionally, the invention provides a method whereby the metal emittermay be formed during the same step as the aperture within which it is tolie is etched into the oxide coating. When ions of the emitter metal areincluded in the etching solution, they are displaced in the solution bysilicon ions from the semiconductor, thereby causing a dot of displacedmetal to precipitate and be deposited in the aperture formed by theetchant. If a thicker or larger contact area is desired, additionalmetal (emitter or other) may be deposited over the first dot by laterevaporation. If the plating metal is properly chosen, a rectifyingcontact may be formed.

The details of the devices of various embodiments of the invention andthe methods for their manufacture will be readily understood from thedetailed description which follows, referring to the drawings, in which:

FIGS. lA-H are a series of cross-sectional views showing the steps inmanufacturing a transistor by the method of this invention;

FIG. 2 is a plan view showing the completed transistor of FIG. 1H;

FIGS. 3A-E are a .series of cross-sectional views showing the steps inmanufacturing a transistor according to the method of another embodimentof the invention;

FIG. 4 is a plan view of the completed transistor of FIG. 3E;

FIGS. SA-H are a series of cross-sectional views showing the steps inmanufacturing a transistor according to the method of still anotherembodiment of the invention; and

FIG. 6 is a plan view of the completed transistor of FIG. H. 7

Referring to FIG. 1, a wafer 1 of semiconductor mateterial (for example,silicon) is prepared, containing P-type and N-type impurities grownsimultaneously with the semiconductor crystal by methods well known inthe art. One pair of impurities often employed for this purpose isgallium and phosphorous. Since gallium (the P-type impurity) outdiffusesat a faster rate than phosphorous (N-type), it should be present insubstantially higher initial concentration to yield the desired finaldoping level.

Wafer 1 is then heated to induce outdiffusion. For outdiffusion ofgallium or aluminum, for example, air, oxygen, water vapor, or otherwell-known oxidizing atmospheres may be selected; for outdiffusion ofgallium, hydrogen is added to the oxidizing agent in the vapor. A layerof oxide 2 (FIG. IE) will form upon the wafer surface-actually, it formson all sides of the wafer, but is shown here only on the upper surfacebecause it has no particular use on the remaining surfaces and is generally removed therefrom. Gallium or aluminum will outdiffuse readilythrough the forming oxide layer; with certain other impurities, presenceof the oxide layer may impair outdiffusion, necessitating a vacuum orother inert atmosphere to avoid formation of the oxide layer. This layermay then be formed in a separate step, following the outdiifusion.

The time and temperature required for PN junction 3 to be formed at adesired depth beneath the wafer sur-' face by outdilfussion may bedetermined empirically. Appropriate figures for various combinations ofsemiconductor materials and impurities are well known in the art. Toinsure a high f the parameters of the outdiffusion process are soselected as to leave a-very small base width (distance between the wafersurface and junction 3), less than about one micron-preferably less thanabout one-half micronbecause the fmax. will be inversely proportional tothis magnitude.

When outdiffusion is completed, a preponderance of N-type inmpuritieswill be left in region 4, because that region will have lost most of itsP-type impurities. Region 5, however, which will not have outdiffusedappreciably, will continue to exhibit substantially P-ty-peconductivity. The area immediately below oxide layer 2 will have thelowest concentration of impurities, since that region will haveundergone the heaviest outdiffusion; as the distance from the wafersurface increases, the impurity concentration in upper (N-type) region 4also increases somewhat.

Outdilfusion will also occur at the lower edge of the wafer (bottom oflower region 5) but since this unnecessary layer of region 5 isgenerally removed, as by lapping, the portion which remains afterlapping will contain a predominance of P-type impurities as in theoriginal wafer.

Next, a photoresist layer (not shown) is applied to the surface of oxidelayer 2 to protect that area 6 which is to be retained as a mask (FIG.1C), and the rest of layer 2 is then removed by a conventional etchingsolution, such as a buffered solution of hydrofluoric acid. The processof photoetching is well known in the art, and needs no furtherexplanation here. I

To extend junction 3 to the surface, a P-type impurity is now difiusedinto the unprotected upper surface of the fusant penetrates thesemiconductor material and forms a P-type collector region whichcombines with the original P-type semiconductor material 5 underlyingregion 4, surrounding the newly-defined N-type base region 7 (FIG. 1D).Junction 3, surrounding region 7, now extends upwards around it on allsides, reaching the wafer surface somewhat under the edge of the raisedportion of oxide mask 6 (extensions 8 of the mask are formed 'byoxidation of the exposed surface of the wafer during the seconddiffusion).

Again the upper surface is coated with photoresist material (not shown),covering oxide mask 6 and its extensions 8, save for the areas where newapertures 9 and 10 are to be formed (FIG. 1B). A conventional etchingsolution is-used to achieve the structure shown in FIG. 1B. Aperture 9will be used to form ohmic contact to base region 7 and aperture 10 willform ohmic contact to the extension of collection region 4 formed by theprevious difiu sion of P-type impurities.

To form the base and contact, a coating of metal, such as gold dopedwith antimony, is now deposited over the entire surface of the wafer, asby evaporation. The gold layer 11 shown in FIG. 1F adheres to the oxideareas on the wafer surface and to the semiconductor material exposed byapertures 9 and 10. To insure ohmic contact formation, the gold isusually alloyed to the wafer surface by methods known in the art. Such aprocess is described in co-pending application Ser. No. 823,838,assigned to the same assignee as this invention.

For a P-type base transistor, aluminum may be used for the contactmaterial.

The wafer is then recoated with photoresist except for the area whereaperture 12 (FIG. 1G) is to be formed, to serve as the emitter. Theaperture is etched through metal layer 11 and oxide layer 6 to exposethe surface of base region 7 at its bottom. To etch aperture 12,however, this invention employs a modification of the conventionaletching solution containing ions of a metal ranking below thesemiconductor material in the electromotive series; these ions will bereplaced in the solution by ions of the semiconductor material (e.g.,silicon). The displaced metal ions will then form into metallic atomswhich will be deposited at the bottom of aperture 12, forming theemitter contact 13 shown in FIG. 1G.

The metal included in the etching solution must meet three criteria:First, in order to plate out onto silicon, it

. must be below silicon in the electromotive series of the wafersurrounding the oxide mask 6. The new P-type difelements. Second, itmust form a rectifying barrier on silicon. Third, it must form a barrierof sufficient height so that the injected minority carrier density willbe high compared to the majority carrier density so that the emitterefiiciency will be high.

For the structure with the N-type base, platinum and rhenium aresuitable metals. For a P-type base, there appears to be no metal whichmeets all these requirements. However, if the processing technique ismodified, as hereinafter described, so as to employ evaporation ratherthan displacement plating, then the first requirement is no longerpertinent and magnesium may be used.

The basic etching solution itself may be a mixture of ammonium fluorideand hydrofluoric acid, or it may be any one of the many standardsolutions which will etch through the unmasked oxide coating on thewafer. A small proportion of the solution-e.-g., about ten percent byvolume-is replaced by an ionic solution of the desired metal: forexample, if a platinum contact is desired, about ten percent of thevolume of etching solution may be replaced by a platinum tetrachloridesolution. Upon immersi-on of the wafer in the resulting mixture, bothmetal and oxide layers are removed, forming aperture 12; at the sametime, a dot 13 of the pure metal is deposited directly onto the surfaceof base region 7 at the bottom of the aperture, as shown in FIG. 1G.

Metallic layer 11 now forms a short between base region 7 and collectorregion 4. Since these regions are normally electrically separated intransistor operation, the process of this invention uses another etchingstep to remove portions or strips of platinum layer 11 to achieve thestructure shown in section in FIG. 1H and from above in FIG. 2.Conventional photoetching is employed for platinum removal, in much thesame manner as it was used earlier for oxide removal. Metal dot 13serves as the emitter contact, metal area 14 as the base contact, andmetal area 15 as the collector contact. As is well known in the art,wires may be bonded to these contact areas, if desired, for use inconnecting the transistor with external circuitry.

Another embodiment of the invention, shown in FIGS. 3 and 4, may befabricated in the same manner as the device shown in FIG. 1D; however,in this embodiment the emitter is not deposited during the etchingprocess, but instead is formed by evaporation and deposition which willform a rectifying contact with the semiconductor material, as describedabove.

Referring to FIGS. 3A and 3B, apertures and 31 are first etched intooxide layer 32 to receive the base and collector contacts, and a layerof appropriate metal which will form an ohmic contact (such as aluminumor gold) is deposited from a vapor upon the entire wafer surface asshown in FIG. 3B. The vaporized metal will be deposited on both oxidelayer 32 and upon the exposed semiconductor material within apertures 30and 31. To alloy the metal to the wafer, the wafer is generally heatedto a temperature greater than the eutectic point of the metal andsemiconductor, but lower than the actual melting point of the metal.Ohmic contact 34 is thus formed to base region 33, and ohmic contact 35formed to collector region 36.

Next, another aperture 37 (FIG. 3C) is etched into the metal and oxidelayers to receive the emitter. As noted above, no metal is used with theetching solution in this embodiment; instead, the vaporized metal isdeposited directly on the surface of the device after completion of theetching process. -A suitable metal (one which forms a rectifying contactwith the semiconductor material) is deposited over the entire wafersurface, forming contact 38 on the surface of the semiconductor materialat the bottom of aperture 37. This layer of metal 39 is not alloyed,however, and so provides a, rectifying contact for the emitter. Aluminumis one example of a metal providing such a contact.

Like the previous embodiment, the device shown in FIG. 3D now has allthree of its regions shorted by deposited metal layer 39. To remove theshort circuit, portions or strips of layer 39 are now etched away (orotherwise removed) to form the structure shown in FIG. 3E and FIG. 4.Metal layer 40 forms the base contact, layer 41 the emitter contact, andlayer 42 the collector contact. The metal of contacts 34 and 35 formsohmic contacts with the semiconductor material, while the metal ofemitter 38 forms a rectifying contact.

'Still another embodiment of the invention is shown in FIGS. 5 and 6. Inthis embodiment the regions underlying the base contacts are diffusedmore deeply than the region underneath the emitter, to make formation ofan alloyed base easier and preclude any possibility of the metal contactshorting through the thin base region into the collector. (It will berecalled that for a high f the base width between emitter and collectormust be less than one micronpreferably less than one-half micron.) 1nconsequence, when ohmic contacts are being formed to such a very thinregion, a very real danger exists that the alloyed metal will piercethrough the thin layer of base material and short out the base andcollector. The added thickness provided below the base contact by thisembodiment reduces this danger without appreciably lessening the i ofthe transistor, because the portion of the base region below the emitterremains thin. The oxide-covered wafer is etched as in FIG. SE to leaveoxide-free apertures 51 and 52 for diffusion therein of the portion ofthe base to which the base contact adheres (herein called the basering).

The wafer shown in this embodiment is circular. In the section views ofFIG. 5, the base ring appears in two laterally symmetrical places. TheWafer is subjected to the diffusion of an oxide-masked impurity of thedesired conductivity type (-P-type in the illustration). Such animpurity may be boron, aluminum, or indium. Gallium is not useful here,because it penetrates the oxide mask. The time and temperature requiredfor this diffusion to achieve a base ring of the desired depth can beascertained from standards well known in the art. The ring depth isgenerally at least one micron, preferably more e.g., in the neighborhoodof five microns-to eliminate any danger of shorting. The resultant basering 52 is shown in FIG. 5C.

The portion of the base region underlying the emitter in the center ofring 52 is formed separately. For this purpose another aperture 53(shown in FIG. 5D) is etched into the oxide mask, and impurities of thesame conductivity type used for the base ring (-P-type in this example)are then diffused into the aperture to form the inner portion of thebase region. This second diffusion is carried out at a lowertemperature, or for less time than the first -(or both); by this means,the depth of inner portion 54 of the base region is made less than thedepth of base ring 52, as shown in FIG. 5E. The depth of inner portion54 is generally less than one micron, preferably less than one-halfmicron, according to this invention to insure a high f uAperatures 55and 56 shown in FIG. 5F are next etched into the oxide on the wafer tomake a place for the base and collector contacts, respectively. Metal isthen deposited over the entire wafer surface in contact with the baseregion 52 and collector region 50 to form the base and collectorcontacts. Base contact 57 is formed in aperture 55 and collector contact58 is formed in aperture 56.

Then the emitter is plated by forming a photoresist mask over thesurface except over area 59 and etching the metal and oxide away fromarea 59 using an etchant solution containing the metal ions, asdescribed above. Finally, the portions of the deposited metal layer areetched away by conventional methods to disconnect the collector and baseregions of the device and to insure that the contacts to these regionsdo not short to emitter 60. The final structure is shown in FIG. 5H andin FIG. 6. Region 61 has the metal removed to avoid base emitter shorts,and region 62 has the metal removed to separate base and collector.Contact 63 is the base contact, and contact 64 is the collector contact.

It will be apparent to one skilled in the art that many modificationscan be made in the transistor of this inven tion and method of itsmanufacture without departing from the spirit and scope of theinvention. Therefore, the invention is limited only as recited in theclaims which follow.

What is claimed is:

1. A method of forming a metal rectifying contact to a semiconductormaterial, which comprises the steps of:

forming an oxide coating on one surface of a body of semiconductormaterial having impurities therein rendering said body predominantly ofone conductivity type,

forming an etchant-resistant mask over a portion of said oxide coating,

exposing said surface to an etching solution to which said mask isresistant, containing the ions of a metal to be used for said contact,said metal having a work function enabling it to form a rectifyingcontact with the impurity-containing semiconductor material and beingbelow said semiconductor material in the electromotive series, saidetching solution removing the oxide from the unmasked portion of saidsurface, and said metal ions replacing some of the semiconductorsilicon, which comprises the steps of:

(a) forming an oxide coating on one surface of a body of silicon havingimpurities therein rendering said body predominantly of one conductivitytype,

(b) forming an etchant-resistant mask over a portion of said oxidecoating, and

(c) exposing said surface to an etching solution to which said mask isresistant, containing the ions of a metal to be used for said contact,said metal having a work function enabling it to form a rectifyingcontact with the impurity-containing silicon and being below silicon inthe electromotive series, said etching solution removing the oxide fromthe unmasked portion of said surface, and said metal ions replacing someof the silicon exposed by the removal of said oxide, thereby leaving adeposit of said metal on said exposed silicon which forms a rectifyingcontact thereto.

3. The method of making a transistor, which comprises the steps of:

(a) forming an oxide coating on one surface of a body of semiconductormaterial containing impurities predominantly of one conductivity typeand having a base region diffused therein containing impurities of theopposite conductivity type, said base region coming to the surface ofsaid body beneath said oxide coating,

(b) forming an etchant-resistant mask over a first portion of said oxidecoating leaving the oxide over a portion of the surface of said baseregion exposed,

(c) exposing said surface to an etching solution to which said mask isresistant containing the ions of a metal having a work function enablingit toqform-a rectifying contact with the impurity-containingsemiconductor material of said; base region, and being below saidsemiconductor material indthe electro: motive series, said. etchingsolution removing the oxide from the unmasked portion of'said surface,and said metal ions replacingsome of the semiconductor material exposedby theremoval of ,S' il: oxide, thereby leaving a deposit of said metalonv said exposed base region which forms a rectifying contact thereon, r(d) exposing a second'portion of the base region by etching away asecqnd portionof said oxide coating thereover,

(e) depositing an ohmic contact-forming-metal o erthe entire surface ofsaid body, therebyforniing ohmic contact to said base region throughsaid sec-l ond exposed portion, and to said deposited metal, 1

(f) removing a portion of said ohmic contact forming, metal over saidbase region between saidrectifying contact and said ohmic contact, saidportionselect ed to electrically separate said ohmic and rectifying.contacts, one to be used as the emitter contact and References CitedUNITED STATES PATENTS 2,856,320 10/ 1958 Swanson v1481.5. 3,183,1285/1965 Leisti'ko 148186 3,241,931 3/1966 Triggs et al.

WILLIAM I. BROOKS, Primary Examiner,

surfacejo f said

